I joined Altera as a Staff Machine Learning Engineer
I’m excited to share that I’ve joined Altera as a Staff Machine Learning Engineer. Over the past few years at Synopsys, I had the opportunity to work on ...
I am a Staff Machine Learning Engineer at Altera, working at the intersection of machine learning, EDA systems, and hardware platforms. My focus is on building and scaling production-ready AI capabilities for FPGA products, with an emphasis on improving performance, productivity, and robustness across real-world silicon design workflows.
Previously at Synopsys, I worked on AI-driven design workflows across multiple stages, applying machine learning to improve optimization and decision-making across diverse design tasks. Building on this foundation, I later focused on prototyping next-generation agentic infrastructure for large-scale design systems, providing orchestration to coordinate execution across tools and agents and enabling end-to-end workflow automation in production environments.
I earned my Ph.D. in Electrical Engineering from the University of Southern California (USC). I also contribute to the technical community through reviewing and technical service for leading venues in design automation and hardware systems. You may find a list of my publications here.
I’m excited to share that I’ve joined Altera as a Staff Machine Learning Engineer. Over the past few years at Synopsys, I had the opportunity to work on ...
I'm excited to announce that our Late Breaking Results paper, "On the One-Key Premise of Logic Locking," has been accepted at DAC, The Chips to Systems Con...
I'm thrilled to share that our research paper, "DECOR: Enhancing Logic Locking Against Machine Learning-Based Attacks," has been accepted for presentatio...
As hardware becomes more ubiquitous in our daily lives, protecting intellectual property (IP) and ensuring secure operations are paramount concerns. I'm ...
I am excited to announce that I have joined Synopsys as a Senior Software Engineer! I interned with the same team in the summer of 2021 and have been ins...
I have passed my Ph.D. dissertation defense, a milestone event in my life! Many thanks to my advisor Prof. Pierluigi Nuzzo and my defense committee membe...
I am excited to announce that I have accepted an offer from Intel Corporation as a Security Research Intern at the Client Computing Group (CCG). A huge t...
Our Work-In-Progress (WIP) paper "Circumventing Machine Learning-Based Attacks to Logic Locking" has been accepted to be presented as a poster in Design ...
I feel elated to share the news that our paper “TriLock: IC Protection with Tunable Corruptibility and Resilience to SAT and Removal Attacks” has been ac...
Officially become a Ph.D. candidate!